CompE 470 — Advanced Digital Design
The objective of this course is to teach the design and testing of fundamental digital modules using Verilog hardware description language, hardware simulation and synthesis tools, and field-programmable gate array (FPGA) devices. Students will implement and test various digital modules on a Zynq FPGA board.
1. Verilog hardware description language
2. Datapath, controller, and memory design
3. FPGA architectures
CompE 475 — Computer Architecture
This course presents the fundamentals of classical processor design and the hardware/software interface to create a computing system that meets functional, performance, and area constraints. The principles presented in the lectures are reinforced through the design of three MIPS microarchitectures in Verilog hardware description language. Students will implement their designed processors on a Zynq FPGA board executing various MIPS programs. Students will learn about hardware-software co-design by utilizing the on-chip ARM processors of the Zynq FPGAs for executing C programs and by implementing a floating-point matrix multiplication co-processor on the programmable logic fabric of FPGA for hardware accelaration. Student will also experience working with various input/output interfaces of the FPGA.
1. MIPS programming
2. MIPS microarchitecture design and FPGA implementation
3. Cache characteristics and parallel architectures
4. System-on-a-chip architectures and hardware-software co-design
CompE 570 — VLSI System Design
This course aims to provide a strong foundation for both undergraduate and graduate students to understand the principle and practice of designing and implementing efficient VLSI systems for digital signal processing applications. Students will design and implement various digital filters in custom fixed-point formats on a Zynq FPGA board. Students will also develop a serial interface for parmaterizing their implemented filters on the FPGA from a custom-developed graphical user interface running on a computer.
1. Fixed-point and floating-point arithmetic
2. Implementation of feedforward and feedback systems on FPGAs
3. Pipelining, parallelism, retiming, folding, and unfolding architectural transformations
EE 670 — Digital ASIC Design
This course focuses on the principles and practices involved in the design of high-performance and low-power application-specific integrated circuit (ASIC) chips. This course will offer valuable design experience through design projects and will provide deeper insight into efficient future large-scale chip designs.
1. SystemVerilog hardware description language
2. Static timing analysis
3. Low power design methodologies